The present invention relates, in general, to electronics, and more particularly, to semiconductors, structures thereof, and methods of forming semiconductor devices.
In the past, the electronics industry utilized various methods and structures to form charge balancing apparatus from battery systems such as nickel cadmium (NiCad) battery systems, nickel metal hydride (NiMH) battery systems, lithium-ion (LiON) battery systems, and other types of battery systems. It was often necessary to transfer energy from one battery cell to another battery cell in order to balance the voltages and energy storage of the cells to be as equal as possible. Some balancing system used transformers to assist in the balancing and other systems used inductors but were limited in the manner in which the inductors could be used to accomplish the energy transfers. The inductor based systems also usually required several transfer cycles in order to balance the states of other of the cells after one cell receives the energy transfer.
Accordingly, it is desirable to have a method of forming a balancing circuit that does not require a transformer, that reduces the time required for the energy transfers, and that facilitates using an inductor in multiple manners to accomplish the energy transfers.
For simplicity and clarity of the illustration(s), elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements, unless stated otherwise. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. One of ordinary skill in the art understands that the conductivity type refers to the mechanism through which conduction occurs such as through conduction of holes or electrons, therefore, and that conductivity type does not refer to the doping concentration but the doping type, such as P-type of N-type. It will be appreciated by those skilled in the art that the words during, while, and when as used herein relating to circuit operation are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay(s), such as various propagation delays, between the reaction that is initiated by the initial action. Additionally, the term while means that a certain action occurs at least within some portion of a duration of the initiating action. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to at least ten percent (10%) are reasonable variances from the ideal goal of exactly as described. When used in reference to a state of a signal, the term “asserted” means an active state of the signal and the term “negated” means an inactive state of the signal. The actual voltage value or logic state (such as a “1” or a “0”) of the signal depends on whether positive or negative logic is used. Thus, asserted can be either a high voltage or a high logic state or a low voltage or low logic state depending on whether positive or negative logic is used and negated may be either a low voltage or low logic state or a high voltage or high logic state depending on whether positive or negative logic is used. Herein, a positive logic convention is used, but those skilled in the art understand that a negative logic convention could also be used. The terms first, second, third and the like in the claims or/and in the Detailed Description of the Drawings, as used in a portion of a name of an element are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments described herein are capable of operation in other sequences than described or illustrated herein.